Senior Engineer Standard Cell Memory Layout, Chennai
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Here are the details of Senior Engineer Standard Cell Memory Layout job in SmartPlay Technologies. This job or placement paper has been sourced from either company website or newspaper or other media and from students who appeared for this job. User is requested to verify the data before applying for the job.
JobCode:- SP-Std Cell / Memory Lay- Sr. Engineer
Qualification:- Diploma/B.E / B.Tech/M.Tech
To design and develop layouts for Standard cells for basic cells to complex cells / SRAM compiler and full custom memories (macro/ block/leaf cells)
Should have understanding of standard cell architecture, layout challenges in high density and performance libraries.
Should have understanding of different memory architectures
Experience and familiarity in various physical verification checks – DRC, LVS, ERC, EM etc
Should have understanding and working knowledge of good layout practices for lower process nodes 22nm, 28nm and 45nm.
Good understanding of deep sub-micron and DFM issues in layout design.
Thorough working knowledge of layout design and physical verification tools - Cadence Virtuoso layout suite, Mentor Calibre, Synopsys Hercules etc.
Responsible for timely and quality execution of layout design.
SmartPlay Technologies is an established design services company with expertise in providing Digital, Analog, Wireless Software and System Design.
The company has 650 employers working on the different projects the company rated Top 5 semiconductor companies in the Silicon India. It has 500 and mid-sized semiconductor and system companies working on Graphics, Mobile, Multimedia and Processor technologies.
5th Floor, Golden Towers
Kodihalli, Old Airport Road
Bangalore - 560 017
Tel: +91 80 43504444
Fax: +91 80 43504445.
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